EVOLUTION-MANAGER

Edit File: tikzlibrarycircuits.logic.IEC.code.tex

% Copyright 2008 by Till Tantau and others Wibrow
%
% This file may be distributed and/or modified
%
% 1. under the LaTeX Project Public License and/or
% 2. under the GNU Public License.
%
% See the file doc/generic/pgf/licenses/LICENSE for more details.

\usetikzlibrary{circuits.logic}
\usepgflibrary{shapes.gates.logic.IEC}

%
% When this lib is loaded, all symbols default to IEC
%

\tikzset{
  circuit logic IEC/.style=
  {
    circuit logic,
    set and gate graphic    = and gate IEC graphic,
    set nand gate graphic   = nand gate IEC graphic,
    set or gate graphic     = or gate IEC graphic,
    set nor gate graphic    = nor gate IEC graphic,
    set xor gate graphic    = xor gate IEC graphic,
    set xnor gate graphic   = xnor gate IEC graphic,
    set not gate graphic    = not gate IEC graphic,
    set buffer gate graphic = buffer gate IEC graphic,
    %
    and gate IEC symbol    = {$\scriptstyle\char`\&$},
    nand gate IEC symbol   = {$\scriptstyle\char`\&$},
    or gate IEC symbol     = {$\scriptstyle\geq1$},
    nor gate IEC symbol    = {$\scriptstyle\geq1$},
    xor gate IEC symbol    = {$\scriptstyle=1$},
    xnor gate IEC symbol   = {$\scriptstyle=1$},
    not gate IEC symbol    = {$\scriptstyle1$},
    buffer gate IEC symbol = {$\scriptstyle1$},
  },
}

%
% The logical gate graphics are all nearly identical, so we provide a
% simple style for creating them:
%
\tikzset{
  circuit logic IEC make graphic/.style=
  {
    #1 graphic/.style={
      circuit symbol open,
      circuit symbol size=width 2.5 height 4,
      shape=#1,
      inner sep=.5ex
    }
  }
}

\tikzset{
  circuit logic IEC make graphic=and gate IEC,
  circuit logic IEC make graphic=nand gate IEC,
  circuit logic IEC make graphic=or gate IEC,
  circuit logic IEC make graphic=nor gate IEC,
  circuit logic IEC make graphic=xor gate IEC,
  circuit logic IEC make graphic=xnor gate IEC,
  circuit logic IEC make graphic=not gate IEC,
  circuit logic IEC make graphic=buffer gate IEC,
  circuit logic IEC make graphic=and gate CDH,
  circuit logic IEC make graphic=nand gate CDH,
}

\endinput